Graduate researcher Northeastern University, MA, United States
Current electronic manufacturing processes have a detrimental impact on the environment and require high operating and capital costs. These processes consist of a complex series of steps using hundreds of high-energy deposition steps (consuming a massive amount of water and electricity). A new sustainable and scalable technique for additively manufacture nano and microelectronics has been developed at Northeastern University. The technique eliminates high-energy, chemically intense processing by utilizing direct assembly of nanoscale particles or other nanomaterials at room temperature and atmospheric pressure onto a substrate, to precisely where the structures are built. In this presentation we show how this technology can print single crystal structures and make transistors using a purely additive (directed assembly enabled) process using inorganic semiconductors, metals and dielectrics nanoparticles suspended using colloid chemistry, and post assembly crystallization using different annealing conditions. The process demonstrates the manufacturing of transistors with an on/off ratio greater than 1E6. Results show that at least an order of magnitude savings in embodied energy cost can be realized. This new technology will enable the fabrication of nanoelectronics while reducing the cost by 10-100 times and can print 1000 faster and 1000 smaller (down to 20nm) structures than ink-jet based printing. The nanoscale printing platform enables the heterogeneous integration of interconnected circuit layers (like CMOS) of silicon printed electronics at ambient temperature and pressure. The printing platform is at TRL 4-5 depending on the application. The platform is currently in use as a research and development tool. Development is ongoing with users and partners to develop the platform to be used in production for advanced packaging and heterogenous integration applications down to the submicron scale.