Achronix’s 7nm Speedster7t FPGAs are specifically designed to deliver extremely high performance for demanding applications including data-center workloads and networking infrastructure. Optimized for high-bandwidth workloads, Speedster7t FPGAs features a revolutionary 2D network on chip (NoC) and a high-density array of AI/ML machine learning processors (MLPs).
The 2D NoC supports the industry’s highest performance interface protocols and enables direct connections between various high-speed and memory interfaces. A host processor can transfer data to GDDR6 or DDR5 memory controllers directly from any of the PCIe Gen5 interfaces by simply configuring the NoC for the task.
Each Speedster7t FPGA features a large array of programmable compute elements, organized into new MLP blocks. Each MLP is a highly configurable, compute-intensive block, with up to 32 multiplier/accumulators (MACs),that support integer formats from 4- to 24-bits and various floating-point modes as well as the highly efficient block floating-point format which dramatically increases performance.