Illinois Institute of Technology Chicago, United States of America
The growing disparity between CPU speed and memory speed, known as the memory wall problem, has been one of the most critical and long-standing challenges in the computing industry. The situation is further complicated by the recent expansion of the memory hierarchy, which is becoming deeper and more diversified with the adoption of new memory technologies and architectures, including 3D-stacked memory, non-volatile random-access memory (NVRAM), memristor, hybrid software and hardware caches, etc. Computer architecture and hardware system, operating systems, storage and file systems, programming stack, performance models and tools are being enhanced, augmented or even redesigned to address the performance, programmability and energy efficiency challenges of the increasingly complex and heterogeneous memory systems for HPC and data-intensive applications.
The MCHPC workshop aims to bring together computer and computational science researchers, from industry, government labs and academia, concerned with the challenges of efficiently using existing and emerging memory systems.