We investigate programming languages and new programming models for HPC and ML. Our tools enables more effective workflows for achieving performant code on varying hardware architectures. We also research support for implementing algorithms correctly by developing cheap verification methods, e.g., proof by a handful of tests. Our theoretical foundation allows us to integrate hardware components in our semantic models, thus letting us bridge the gap between software and hardware in a uniform setting. For instance:
• We can treat the data dependencies of an algorithm, from its top level components all the way down to the individual array element level, as first class data and provide locality preserving mappings onto heterogeneous hardware architectures.
• We enable the domain specialist to write a PDE solver using high level domain specific abstractions with tailored optimisation rules, which through several abstraction layers is represented as nested multidimensional array operations. Here we apply mathematics of arrays (MoA) which allows us to integrate these into a monolithic array structure and use hardware specific rules to partition and map it onto the target hardware architecture.
Bergen Language Design Laboratory (BLDL) is a research lab at the Department of Informatics, University of Bergen, Norway. We participate as technical experts on the ISO C++ committee and in the ISO Fortran committee subgroup on generic programming.
BLDL is looking for new research collaborators and projects, especially domain scientists that want write code at the abstraction level of their equations. We welcome research visitors and students.